Description: 并行AVS实时编解码器设计与实现
介绍了一种并行AVS实时编码器的设计，它包括音视频数据输入、音视频编码、传输流系统复用器、输出和控制部分，其
中重点介绍了视频编码器和传输流系统复用器的设计和实现。实验结果证明，实现标清AVS实时编码器是可行的。-Parallel real-time codec AVS Design and Implementation of AVS introduce a parallel real-time encoder design, which includes audio and video data entry, audio and video encoding, transport stream multiplexer system, the output and control parts, which focuses on video encoding and Transport Stream Multiplexer System Design and Implementation. Experimental results show that AVS realize SDTV real-time encoder is feasible. Platform: |
Size: 308224 |
Author:sss |
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Description: This program is distributed under the GNU copyright, please see the accompanyingfile COPYING for details. Please note that only the changes to the original sourcecode are copyrighted under GNU, except for the the multiplexer portions, whichare also under the GNU copyright. The copyrights for the other two source programs,the video and audio encoders are detailed in their respective source, as well as theoriginal distributions.-This program is distributed under the GNU copyright, please see the accompanyingfile COPYING for details. Please note that only the changes to the original sourcecode are copyrighted under GNU, except for the the multiplexer portions, whichare also under the GNU copyright. The copyrights for the other two source programs, the video and audio encoders are detailed in their respective source, as well as theoriginal distributions. Platform: |
Size: 98304 |
Author:liusheng |
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Description: MSTAR高清机顶盒芯片资料。集成DVB-Cdemodulator。-The MSD7828L is a highly integrated ASIC for STB (Set-Top Box) applications. It is configured with a DVB-C
demodulator, a transport stream de-multiplexer with time-shifting capabilities and limited recording of another
TS stream, a DVB-CSA descrambler, smartcard interface, an MPEG-2 MP@HL AV decoder, an H.264 video decoder compliant with ITU-T H.264, ISO/IEC 14496-10, a digital video encoder for supporting
CVBS/S-Video/YPbPr SD and HD outputs, and an HDMI transmitter up to 1080i. Platform: |
Size: 239616 |
Author:gushun |
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Description: 提出了一种基于FPGA 的数字复接电路的设计方法, 将多路视频信息复用为一路信息,
利用光纤传输平台进行传输, 提高了传输效率和传输质量, 改善了环境适应性. 在AL TERA 公司
的Q uartu s II 软件平台下, 应用VHDL 语言进行硬件电路的设计, 并给出了仿真结果.
关键词 视频信息, FPGA , 数字复接, 光纤通信-Presents a FPGA-based digital multiplexing circuit design method, multi-channel video information re-used as a way of information, the use of optical fiber transmission platform transmission, improve transmission efficiency and transmission quality, and improve the adaptability to environment. In AL TERA Q uartu s II the company' s software platform, the application of VHDL language hardware circuit design and simulation results. Keywords video information, FPGA, digital multiplexer, optical fiber communication Platform: |
Size: 157696 |
Author:renxiang |
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Description: 光纤通信以其损耗低、高带宽、抗电磁干扰、保密性好等优点越来越多地应用在视频通信中[1～ 5 ]. 针对
光纤综合业务传输平台, 本文提出了一种将三路视频信息复用为一路视频信息的数字复接器的硬件电路
设计. 提高了传输容量和传输效率, 达到抗干扰、抗噪声的能力, 从而改善了传输平台的环境适应性及工作
性能. 该复接器硬件电路的设计采用EDA 技术, 以FPGA 器件为载体, 使用VHDL 硬件描述语言进行电路-Optical fiber communication with its low loss, high bandwidth, anti-electromagnetic interference, security and good benefits are increasingly used in video communications in the [1 ~ 5]. For the fiber optic integrated services delivery platform, this paper presents a three-way will be video information re-used as the way digital video multiplexer hardware circuit design. to improve the transmission capacity and transmission efficiency, to achieve anti-jamming, anti-noise capability, thereby improving the transmission platform, environmental adaptability and work performance. The re- connector hardware circuit design using EDA technology to FPGA devices as the carrier, using the VHDL hardware description language circuit Platform: |
Size: 325632 |
Author:renxiang |
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